Overview:

The LPDDR4 standard was created to address the need for increased memory bandwidth in low-power, high-performance smartphones and mobile devices. LPDDR4 is designed to be a single 32-bit wide die with two independent 16-bit wide channels. This is the first traditional DDR SDRAM that defines more than one channel for the die. The LPDDR4 JEDEC standard describes a single device with two independent channels on one DRAM die. It also includes package options that include multi-die packages with four independent channels.

This webinar explores different methods of connecting the multiple channels of DRAM into the SoC, including operating all the channels independently or joining some of them together. It discusses the tradeoffs in SoC floorplans, logical to physical addressing, connecting to on-chip buses, and low-power methods as they are affected by the multi-channel connections to LPDDR4.

Attend this webinar to learn:

  • How LPDDR4 is different from previous JEDEC DRAM
  • Ways to connect two or four channels of LPDDR4
  • How to handle 2-die and 4-die packages
  • How to share channels by using SoC partitioning for LPDDR4 PoP
  • How to optimize channels for power consumption and performance

Register for this webinar to learn different methods of connecting multiple channels of DRAM into the SoC, including operating all the channels independently or joining some of them together. You’ll learn about the tradeoffs in SoC floorplans, logical to physical addressing, connecting to on-chip buses, and low-power methods as they are affected by the multi-channel connections to LPDDR4.

Speakers

Marc Greenberg
Director of Product Marketing for DDR Controller IP at Synopsys

Marc Greenberg is the Director of Product Marketing for DDR Controller IP at Synopsys. Marc has 10 years of experience working with DDR Design IP and has held Technical and Product Marketing positions at Denali and Cadence. Marc has a further 10 years experience at Motorola in IP creation, IP management, and SoC Methodology roles in Europe and the USA. Marc holds a five-year Masters degree in Electronics from the University of Edinburgh in Scotland.