Consumer products with USB 3.1 functionality – especially 10G speeds– will start hitting the market in 2015. While some SoC designs are well on their way to taping out with USB 3.1, others are still in the early design phases of incorporating the features offered with the new specification. The SoC designers quickly realize that while the specification may seem to be a simple upgrade from USB 3.0’s 5 Gbps to USB 3.1’s 10 Gbps speeds, understanding the changes to the physical layer, link layer, protocol layer, and hub are critical to the successful implementation of this specification.

This webinar will provide an in-depth look at the USB 3.1 specification’s changes to the physical layer, link layer, protocol layer, and hub. It will cover the new Type-C connector, use of repeaters in USB 3.1 designs, 128b/132b encoding schemes, two traffic classes, the start-up speed negotiation protocol, and more.

Attendees Will Learn:

  • Physical Layer changes, including the Type-C connector and when designers will need to implement repeaters
  • Link Layer changes, including 128b/132b encoding schemes, Type 1 and Type 2 traffic classes, increasing the link rate through the use of LFPS-Based PWM Messaging (LBPM)
  • Protocol Layer changes, including the use of Multiple INs and transaction packet labeling
  • Hub changes, including packet arbitration and buffer requirements

Who Should Attend:
SoC designers, architects, and managers interested in implementing USB 3.1 functionalitySpeakers

Matthew Myers
Sr. Staff R&D Engineer, Synopsys

Matthew Myers, Sr. Staff R&D Engineer at Synopsys, has been applying his system-level design skills to the development of communication-standards intellectual property for 14 years. During that time, Matt has been an RTL designer and architect for a Java hardware accelerator, PCI, PCI Express, USB 3.0, and USB 3.1 controllers. Besides hardware design, he developed the firmware used in the Certified Wireless USB IP. He has also been involved in the USB-IF, PCI-SIG, and WiMedia Alliance organizations, co-authoring the of PIPE (PHY Interface for PCI Express) specification, and contributing to the industry specifications for PCI Express, WiMedia MAC, Wireless USB, USB 3.0, USB 3.1 and xHCI. Prior to Synopsys, Matt worked at Hewlett-Packard and inSilicon.