Overview:
With the rapidly growing demand for increased data rates, operators are forced to quickly upgrade their networks by adapting to 3.5G and 4G standards (HSPA+, LTE and WiMAX).
Traditionally, operators built their wireless networks around conventional base station architectures. With the introduction of Femto-cells, operators will be able to build a heterogeneous network hierarchically using: Femto, Pico, Micro and Macro cells.
This evolving base station topology forces substantial challenges upon equipment manufactures to offer wireless broadband devices, with high sensitivity to cost. The OEMs are looking for new ways to significantly lower their development costs, in order to achieve a lower MSRP and meet the operators budget.
This webinar will offer a fresh approach for designing advanced 4G solutions targeting the various network equipment devices.
Topics to be covered:

  • How to meet the extreme processing requirements of 4G base station applications
  • How to design a scalable solution applicable to Femto, Pico, Micro and Macro cells
  • How to design a flexible solution enabling multi-mode baseband
  • How to enable a dramatic cost reduction compared with today’s wireless infrastructure systems
  • How to simplify software development and leverage upon legacy software investment

Who should attend:
The session should be attended by wireless baseband chip architects and designers, system engineers and baseband algorithm and software engineers planning to implement 4G baseband solutions.
Speakers:
Eyal Bergman – Director of Product Marketing, CEVA
 
Eyal Bergman serves as a Director of Product Marketing for CEVA. In his role, he is responsible for all Marketing aspects related to CEVA’s DSP products. Prior to this, Mr. Bergman was the Application Solutions Department Manager at CEVA. Mr. Bergman has worked for CEVA & DSP Group since 2000, and held several development and managerial R&D positions. Mr. Bergman holds MSc & BSc degrees in computer sciences from Bar-Ilan University 
Michael Boukaya – Director of Processor Architectures, CEVA
Michael Boukaya serves as Director of processor architectures at CEVA. He has twelve years of experience in the semiconductor and silicon industry. Prior to this, Mr. Boukaya worked as the VLSI Project Manager of CEVA DSP cores and subsystem platforms. Previously, Mr. Boukaya worked at DSP Group, starting at 1998 as a VLSI design engineer. Mr. Boukaya holds a B.Sc. in Electrical and Computer Engineering from the Technion Institute in Israel and holds several US patents. He serves as chief architect of the company, and in this capacity he evaluates new technologies in various domains (like LTE-A, LTE, WiMAX16m and HD video standards) and to define architecture specifications of next generation processors and multimedia platforms. 
Michael was in charge for definitions and implementation of various DSP cores such as CEVA-XC, CEVA-TeakLiteIII, CEVA-X1620 and CEVA-X1641. In addition, Michael owns US patents in VLSI and architecture domains like a unique accelerator interface and ISA extension techniques.