Overview:
DDR memory system debug and validation work require debug tools that can provide comprehensive parametric and protocol measurement. Are you looking for an affordable solution that will provide the capability to verify your DDR system? This presentation will review the tips of using a mix signal oscilloscope as a one box solution in making DDR parametric and protocol measurement.


Duration: One hour


Who should view this webcast:
R&D designers, engineers, and project managers working on high-speed digital designs; who spend a significant amount of time in the debug and validation phase dealing with signal integrity and protocol related problems in their designs


Giveaway:
Registrants who completely fill out the feedback form by January 1, 2010 will be eligible to win one of two $75 Amazon.com gift certificates. Drawing only open to residents of the 50 United States and Canada (except Quebec). Official Rules


Presenter:

Ai-Lee Kuan, Agilent Technologies


Ai-Lee Kuan joined Agilent in 2001 and held various positions in manufacturing as a test and product engineer. Her expertise is in high speed bus application with the logic analyzer. She joined the logic and protocol test marketing team in 2007, focusing on the memory market. Ai-Lee holds a Bachelor's degree in electrical and electronics from University of Science Malaysia.