Consumer applications ranging from cell phones, computers, TVs and even digital picture frames are incorporating wireless communication transceivers to implement broadband standards such as LTE, WiMAX and WiFi to provide wireless connectivity to the outside world. These transceivers rely on an analog interface in the digital baseband processor System-on-Chip (SoC) to connect with the RF block. This analog interface is constantly evolving to adapt to the different communications standards. In this webinar you will: 

  • Understand the characteristics of the analog interfaces and why they are easy to integrate on the digital baseband SoC
  • Get an overview of the constituent DesignWare┬« Data Converter IP blocks – Analog-to-Digital Converters (ADC) for the Receive (RX) path; Digital-to-Analog Converters (DAC) for Transmit (TX) path; and Phase Locked Loop (PLL) and how they can support multiple communication standards.
  • Review the recent evolution of the Data Converter technology in terms of power dissipation and area.
  • Learn how these DesignWare Data Converter IP blocks can be integrated to create a flexible interface that seamlessly communicates with any RF transceiver block without penalty in the total system power dissipation.

Who should attend: SoC Design Engineers, Managers and System Architects

Manuel Mota, Technical Marketing Manager, Converter IP Solutions Group, Synopsys
Manuel Mota has worked in the semiconductor industry for more than 8 years as analog IP designer for Chipidea Microelectronica (Portugal) with responsibility for the design of PLL and Data Conversion IP cores as well as complete Analog Front-Ends for communications. He later assumed the role of Business Developer for Data Conversion products with the responsibility of product definition and pre-sales technical engagement with customers. He joined Synopsys from MIPS Technologies in May 2009, assuming the Technical Marketing Manager role. Manuel holds a PhD in Electronic Engineering from the Lisbon Technical University which he completed while working at CERN (Switzerland) as a Research Fellow. He has authored several technical papers and presented in technical conferences on analog and mixed signal design.