The Five Pitfalls of 4G Baseband SOC Design
For the first time in memory, the industry is converging on a single wireless standard to cover all high data-rate cellular and wide-area-network needs – LTE. The emerging LTE standard is complex, requires extraordinary computation throughput and much better power efficiency than previous wireless baseband PHY subsystems. Because of the complexity, designers are taking many different approaches to chip design for LTE.
This webinar explores five significant challenges faced by designers of efficient digital basebands, including pitfalls in LTE's many modes, excessive cost and power, the "million MIPS" hurdle of Turbo decoding, and the dilemma of choosing the right communications among the LTE building blocks. This webinar uses detailed examples from an end-to-end LTE PHY baseband architecture to highlight the key dos and don'ts.
Who should attend:
This session is designed for architects of next-generation SOCs for 4G baseband. Anyone interested in making sure they've covered all the bases involved in this complex design should listen to make sure they're not falling into one of these pitfalls.
Dr. Chris Rowen, CTO, Tensilica
As Tensilica's founder and CTO, Chris Rowen has been actively involved in designing innovative architectures for highly complex projects ranging from climate modeling to 4G baseband. He was the chief architect of Tensilica's popular ConnX Baseband Engine and holds several patents in fundamental areas of processor design.
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