The majority of your next FPGA is already complete: you have IP purchased or designed in-house that is part of a design that you’ve tuned and perfected for several generations. All you need to do is increase the performance, have it consume less power, and reduce the cost, and this is often the easy part. The difficult part is adding the new product capability—the portion of the design that is new and the differentiator that separates your product from the competition. 

Xilinx® 7 series FPGAs unleash the potential of 28nm to solve these challenges. Tune in to learn how to take advantage of Xilinx 7 series FPGA platforms that combine the industry’s lowest power, highest performance 28nm FPGAs, ISE® 13 design tools, AXI4™ compliant IP, and targeted reference designs running on development boards—all the elements to get started and migrate your existing design to the new 7 series FPGA as quickly as possible, so you can focus on differentiation. 

What you’ll learn:

  1. Build designs using a unified, Virtex®-based, architecture that spans from 8K to 2M logic cells
  2. Explore techniques to take advantage of the lowest power, high performance FPGA series ever
  3. Achieve unrivaled system performance using market-optimized FPGAs
  4. Connect to the rest of the system using the greatest number of flexible, high performance, serial transceivers

After this session you will be prepared to take full advantage of Xilinx 7 series FPGAs to meet all of your next generation system requirements. 

Who should attend: Hardware Design Managers, FPGA design engineers, ASIC designers, and system engineers.

Brent Przybus, Director of Product Marketing, Xilinx, Inc.
Brent Przybus is Director High End FPGA Component Marketing with responsibility for global product introductions and marketing campaigns for the company’s current and next-generation flagship Virtex FPGAs. Przybus joined Xilinx in 2001 and has over 15 years of marketing and engineering experience in the programmable logic industry. Prior to joining Xilinx, Przybus worked as an engineering manager in the advanced graphics and high-performance computation industries with Evans & Sutherland and LinuxNetworx, where he designed systems based on programmable logic to implement advance simulation environments and accelerators for data intensive computation. Przybus has authored, published and presented globally in conferences, journals, and trade publications. 

Przybus holds a BS in computer engineering from the University of Utah in Salt Lake City, Utah and a MBA from Westminster College in Salt Lake City, Utah.