System Design Considerations and Features for SuperSpeed USB 3.0 Hubs
As 5Gbps SuperSpeed USB 3.0 connectivity is
increasingly being adopted in the market, more and more system implementers are
considering adding USB 3.0 hubs to increase their designs’ connectivity to many
peripheral devices. This webinar will provide a brief overview of the USB 3.0
hub architecture compared to USB 2.0. It will also highlight the design
considerations and features that a USB 3.0 hub can provide, including low-power
states and power consumption, integrated support for Battery Charging 1.2 for
mobile devices, and cost saving considerations.
Attendees will become familiar with overall USB 3.0 hub
features and benefits. The following topics will be covered:
- Overview USB 3.0 vs USB 2.0 hub architecture
- Performance improvement in USB 3.0 hubs
- Low-power states and consumption introduction
- Implementation of USB 3.0 hubs to support different charging features
- Cost saving considerations
Duration: 50 minutes + Q&A
Who should attend:
System designers who would like to
include SuperSpeed USB 3.0 hubs for adding higher connectivity and charging
features to their systems.
Philip C. Leung, Strategic Marketing
Manager, Renesas Electronics America, Inc.
Philip is responsible for
Renesas’ USB ASSP product marketing. He has more than 15 years of industry
experience in computer system architectures, designs, marketing and business
development. Philip has a MS in Electrical and Computer Engineering from the
University of Washington and is a co-inventor of four U.S. patents in stochastic
supersampling in computer graphics ASIC designs.
W. Johnson, Senior Staff Engineer, Electronic Design, Renesas Electronics
Dave has been responsible for USB 2.0 and USB 3.0
applications support and related software for product testing for the past eight
years. Prior to joining Renesas (formerly NEC Electronics), he accumulated many
additional years of experience in board-level design (digital and analog), data
communications, MPU-based designs, technical support for PC chipsets (both core
logic and graphics), and product testing software.
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