Overview:
Multi-time programmable (MTP) non-volatile
memory (NVM) is embedded in a wide range of applications including battery
management ICs for mobile devices, security and encryption SoCs for content
protection, MEMS and sensors, and RF / wireless applications. One of the keys to
successfully ramping to production with MTP NVM IP technology is the silicon
testing and qualification.

This webinar will focus on three topics:

  • Review the overall strategy for releasing MTP NVM IP into production
    including manufacturability, reliability, and monitoring considerations
  • Compare and contrast the applicable industry standards for qualifying
    embedded MTP NVM IP, including qualification for commercial and automotive grade
    products
  • Understand how Synopsys designs and executes on a silicon testing
    methodology for embedded MTP NVM IP technology, enabling SoC designers with
    reliable and qualified solutions for their end applications

Estimated Length: 50 minutes + 10 minutes of
Q&A

Who should attend:
Analog IC designers, SoC
design engineers, Managers and system architects

Presenter:
Martin
Niset, Senior Product and Test Engineering Manager, Synopsys

Martin
Niset is Senior Product and Test Engineering Manager for the NVM IP product line
at Synopsys. Prior to joining Synopsys, Martin managed all the silicon testing
and qualification activities for the NVM product lines at Virage Logic and
Impinj. Martin has over 10 years of experience working with embedded NVM
including automotive grade embedded Flash technology while at Freescale. Martin
holds a Engineering in Physics BS from the Université Libre de Bruxelles, and a
Mechanical Engineering MS from the University of Texas, Austin.