HD graphics and video require very high memory bandwidth. The cost-conscious SoC architect cannot afford to over-engineer the memory system and so needs to ensure high-efficiency is achieved from a low-cost, low-power memory system. Systems without QoS (Quality of Service) tend to result in high memory latency which negatively affects CPU performance. QoS schemes are needed to ensure low-latency for latency-sensitive masters like the CPU whilst maintaining high-bandwidth for multimedia. We start with a look at the fundamentals of queue theory. From that we deduce that there are three possible theoretical approaches to implementing QoS. We look at the trade-offs inherent in each approach and examine their effectiveness. Finally we introduce the ARM QoS-301 plug-in for the NIC-301 AXI interconnect, which supports all three approaches, used independently or combined.

Attendees will learn:
Quality of Service is essential to manage bandwidth and guarantee bandwidth for critical masters as well and maximizing CPU performance
QoS is a complex subject which ARM has spent a lot of time solving. There are 3 main approaches to consider
QoS-301 as the ARM programmable solution, available today, supporting all 3 main approaches singly or in combination

Ashley Stevens, Solutions Architect
Ashley has been with ARM since 1995 and has a background in SoC design and architecture. Previously he worked for Tadpole, maker of Unix laptops, Acorn Computers (where the ARM processor was originally developed) and Marconi. Ashley holds a Bachelor of Science in Computer Engineering from Queen Mary College London.