How to pass Compliance Test for Add-In Cards or Mother Boards according to CEM Specification
The PCI-SIG® started “fyi”-testing of cards and motherboards according to the CEM-spec during workshops in April 2011. As preparation for official compliance testing, PCIe rev. 3 test tools, supplied by the PCI-SIG, this website will discuss the essential calibration method of the stress signal for receiver testing.
The webcast will:
- teach how to test receiver compliance of PCI Express 3.0 add-in cards and motherboards according to the CEM spec of the PCI-SIG
- explain the new receiver test approach and its challenges
- discuss best practices from recent PCI-SIG events
- explain how Agilent’s test equipment, like the J-BERT N4903B, the N4916B de-emphasis signal converter and Infiniium 90000 X-series, can be used to ensure proper link training and accurate stressed jitter and stressed voltage receiver testing
Who should view this webcast:
R&D and Design Verification Engineers doing physical layer test and/or characterization on receivers of PCIe3 add-in-cards and motherboards.
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Michael Fleischer-Reumann, Agilent Technologies
After receiving his Diploma in electrical engineering from the Ruhr-University, Bochum, Germany, in 1980, Michael joined HP in Boeblingen. His R&D work resulted in patents on fiber optic components, electronic circuits and measurement methods. Nowadays with Agilent as planner and application expert for BERTs, he contributed to standardization within OIF, IEEE and PCI-SIG.
PCI EXPRESS is a registered trademark of the PCI -SIG.
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