On-Chip ESD Protection in Complex Analog/Mixed-Signal and High-Voltage Designs
Electrostatic discharge (ESD) is a serious
threat to integrated circuits (ICs) that can cause irreversible damage. Please
join X-FAB for a free webinar on ESD protection to learn how to eliminate ESD
threats in complex analog/mixed-signal and high-voltage designs.
webinar presents an overview of various ESD protection concepts, and explains
the structures and schemes available to protect against electrostatic discharge
in X-FAB’s enhanced 0.35 and 0.18 micrometer XH035 and XH018 high-voltage
foundry processes. It examines behavior, layout and application requirements. It
also highlights similarities and differences among ESD protection concepts,
outlining the advantages and disadvantages of each in circuit designs.
Bergmann, Design Support Engineer, X-FAB Semiconductor Foundries
Bergman is working in the field of electrostatic discharge (ESD) and ESD
protection on circuit-level since 2006. The main focus of his work is the
development and ESD characterization of protection structures and IO-Cells in
X-FAB’s technology feature sizes from 0.13 µm to 1.0 µm.
Lars holds a
diploma degree in Electrical Engineering focusing on microelectronics from the
University of Applied Sciences Schmalkalden, Germany
Please disable any pop-up blockers for proper viewing of this webinar.