Manufacturing-Aware Routing at 32/28nm
With the advent of each new technology node the complexity of doing design has increased and the need to consider yield as one of the objectives during design is now considered a necessity at the 32/28nm node. In this webinar we will discuss how IC Compiler’s Zroute Technology is built to consider manufacturability as one of the objectives of routing along with the techniques to address manufacturing during routing.
Yukti Rao, Product Marketing Manager, IC Compiler, Synopsys
Yukti Rao is the Product Marketing Manager for routing technology in IC Compiler. She has 12 years of experience in EDA and the semiconductor industry in various positions. Yukti has a MSEE from University of Arizona, Tucson and BSEE from Manipal University, India.
Dr. Tong Gao, Synopsys Fellow
Dr. Tong Gao is a Synopsys Fellow. Tong has been with Synopsys for more than seven years leading routing technologies and is the architect of IC Compiler Zroute. Before Synopsys, Tong was responsible for routing technologies in Monterey Design Systems, Avant!, and Silicon Graphics. He received his BS, MS, and Ph.D. degrees in Computer Science from University of Illinois at Urbana-Champaign.
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