Introducing 28-nm Stratix V FPGAs: Built for Bandwidth
While supporting increasingly demanding bandwidth requirements, your products also need to meet stringent cost and power budgets. Altera’s new 28-nm Stratix’ V FPGAs deliver groundbreaking innovations addressing the challenges of next-generation designs.
In this 35-minute webcast, you’ll learn how Stratix V FPGAs deliver:
- Highest bandwidth—12.5-Gbps and 28-Gbps transceivers, 800-MHz DDR3 interfaces
- Unprecedented system integration—hard intellectual property (IP) blocks including Embedded HardCopy Blocks
- Ultimate flexibility—user-friendly partial reconfiguration
- Risk-free path to lower cost and 50% lower power with HardCopy V ASICs
Bernhard Friebe, Product Marketing Manager, High-End FPGAs, Altera Corporation
Bernhard Friebe is a product marketing manager responsible for Altera’s Stratix high-end FPGA family. Mr. Friebe joined Altera in 2003 and has held various marketing and engineering positions, including product marketing engineer and senior product FAE. Prior to joining Altera, Mr. Friebe was a project manager of ASICs and FPGAs at Bosch Telecom and Marconi Communications in Backnang, Germany, and an ASIC design engineer at the Institute for Microelectronics in Stuttgart, Germany. He holds an MSEE from Technical University in Stuttgart, Germany.
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