Overview: 
The EDA360 vision is transforming the industry. Building on this vision, Cadence introduces a new approach to realizing silicon. In this webinar, we’ll show you an innovative, streamlined, and cost-efficient method that enables you to design, implement, and verify your ICs by focusing on three requirements—design intent, abstraction and convergence. Using a mixed-signal design as an example, Cadence will show you a new path combining the tools and visibility you need to work simultaneously and effectively, boosting productivity, predictability and profitability. With a predictable, repeatable path to closure, you’ll develop higher quality silicon without sacrificing your cost goals. 
Who should attend:
Attend this webinar if you are you are an engineer and engineering manager that cares about increasing productivity, and are facing challenges such as low power, mixed signal, Giga-gates/Gigahertz, global productivity and metrics, SiP co-design and verification. 
You will learn about: 

  • a new holistic approach to Silicon Realization that moves chip development beyond a patchwork of point tools down a streamlined holistic path of integrated end-to-end technology
  • tools engineers need to work simultaneously and effectively, boosting productivity, predictability and profitability.
Presenter: 
David Desharnais, Product Management, Silicon Realization 

In the seventeen years of design and industry experience, David has held technical and business leadership positions spanning research and development, design, process engineering, field applications, and marketing. Today, David leads Cadence Silicon Realization product management for all aspects of digital and analog design, verification, and implementation across silicon, package and board fabrics. David holds a BSEE and Masters from University of Washington.