Implementing a Low Power, FPGA-based Embedded System with Lattice Propel Design Tool and RISC-V
Low power programmable logic has become more and more common as a core technology used to build electronic systems. By implementing a processor core (in software or hardware) on a small form factor, low power FPGA, developers can provide low power co-processing support to a CPU, SoC, or ASIC to help keep power consumption and data latency low; key requirements for many embedded applications operating at the network Edge.
This webinar will give you an understanding of how small form factor, low power FPGAs from Lattice Semiconductor can be implemented in Embedded Systems to help keep power usage low and avoid data bottlenecks. The webinar will specifically focus on using the Lattice Propel™ design software to quickly and easily build, compile, analyze, and debug a co-processing solution for use in embedded applications. During the webinar, we will use Lattice Propel software tool to manage embedded FPGA designs in hardware and software using a RISC-V processor. For more information about Lattice Propel, please visit: www.latticesemi.com/propel.
Attendees will learn:
- How to create embedded based hardware platforms and easily build the architecture using the Lattice Propel Builder
- Discover how to achieve higher efficiency when using Lattice’s IP library to create the hardware project based on auto-building HDL code
- How to integrate VHDL/Verilog code in the canvas of Propel Builder and FPGA implementation.
- About setting up S/W application, compile, analyze, and debug the systems using Lattice Propel
- A step-by-step demonstration for taking a processor application design from concept to realization on the hardware
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