How to Solve the Most Common High-Speed Bus Issues in Embedded Design on a Budget
Today’s embedded systems are a far cry from those implemented even a few years ago. They have become more powerful with the integration of high-performance FPGAs and the incorporation of high speed serial and parallel busses. Verification and debug of these systems have become more challenging and time consuming. Customer expectations of USB and internet connectivity support for high resolution and multimedia displays, future-proof growth paths including expanded mass storage and high performance require support for the latest technologies. Interfaces like USB, wireless and wired Ethernet, HDMI, DisplayPort, eSATA, ever faster memory and even PCI Express are becoming commonplace. Not only are these interfaces running at speeds 10-100x of those used in previous designs, but, unlike the custom developed proprietary interfaces that had been common in the past, these often require proving compliance with the specification to a 3rd party before the product can ship with a logo claiming support. This webcast will discuss embedded design challenges and how new test tools can reduce cost and accelerate the development cycle of embedded system designs.
Who should view this Webcast?
Embedded System Designers using controllers and FPGAs that include high-speed solutions such as PCIe, USB, DDR, and Gigabit LAN < 2.5 GBit.
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Perry Keller, Program Lead, Agilent Technologies
Perry Keller is the Program Lead for Applications and Standards in Agilent’s Digital Test Division, and Manages Agilent’s Memory Application Program. He has over 25 years of experience at Agilent Technologies in the areas of software and system engineering, high-speed hardware and ASIC design and validation, software engineering, product marketing, and project management. Perry graduated in 1980 from Rice University with a Masters Degree in Electrical Engineering. He is married with two young daughters and enjoys bicycling and skiing in his spare time.
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