How Flexible Floating Point IP Can Be Used to Control QoR
Meeting design requirements and project objectives is a must. Being able to do it with precision is an innovation that can differentiate one product from another. With the explosion of data traffic in all aspects of today’s connected world, SoC designers need more control over floating point logic used in their design. Attend this webinar and find out how you can control your design’s floating point logic using the DesignWare Foundation Cores flexible floating point format. We will use a multiply/addition example showing the QoR benefits, the versatility of flexible floating point format, and precision tuning of the design.
What you will learn:
- Achieving design requirements with precision
- Making power, performance and area tradeoffs with floating point accuracy
- Meeting design objectives for SoCs that require complex mathematical operations
Who should attend:
SoC designers, design managers, R&D teams
John A. Swanson has been working in the IP business since 1990 when he joined Logic Automation / Modeling which was later acquired by Synopsys. John has worked in the design, verification, integration and implementation aspects of complex IP in engineering methodology, and business development and marketing. He has been working on System-on-a-Chip technologies and methodologies for over ten years with Synopsys in a variety of assignments. Currently he is the product line manager for the DesignWare Ethernet family of Digital cores as well as JPEG, 1394 and the IP reuse tools. Prior to joining Synopsys he worked for Amoco Oil Company designing wellhead automation and control systems. He is an Honor graduate from DeVry Institute of Technology where he completed his engineering degree with Presidents List honors.
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