Highest Performance, Most Affordable Way to Validate SoC and ASIC Designs
As more design starts are commonly using FPGA-based prototypes for software development and system validation, designers are constantly evaluating how quickly and effectively these solutions will allow them to achieve the highest prototype performance while minimizing ASIC development risk. This webinar will introduce Synopsys’ HAPS®-80 Series of FPGA-based prototyping systems, which have been designed to deliver maximum system performance and support for up to 1.6 billion ASIC gates. Combined with ProtoCompiler software which is co-designed with HAPS, designers are able to automate partitioning and accelerate time to first prototype in weeks. ProtoCompiler takes advantage of HAPS-80’s new high-speed time-domain multiplexing capabilities to automatically select the optimum mix of pin-multiplexing schemes to achieve the highest performance. In addition, ProtoCompiler and HAPS-80 systems deliver superior debug visibility through always available HAPS Deep Trace Debug technology, providing the ability capture signals at speed. The webinar will detail the newest integration and automation features of HAPS-80 and prove why the HAPS Series is selected most often by design teams around the world.
Attendees will learn:
- Performance capabilities of HAPS-80 and ProtoCompiler to yield up to 100 MHz multi-FPGA performance
- Automated partitioning features to reduce time to first prototype to less than two weeks on average
- Features for multi-design mode to support enterprise configurations up to 1.6 billion AISC gates and concurrent design execution
- Built-in debug capabilities for minimally invasive debug and the ability to capture of thousands of RTL signals
- Support for hybrid use modes and integration with simulation and emulation technologies to save months of design and verification bring-up time
Neil Songcuan isa Senior Product Marketing Manager with Synopsys, who is responsible for the FPGA-Based Prototyping Solution.His experience includes the areas of semiconductor, hardware-assisted verification and system validation. Neil has held various marketing management positions with Synplicity, Mentor Graphics and IKOS Systems. Additionally, Neilpreviously held customer marketing and application engineering roleswith Altera Corporation. Neil holds a B.S.degree in Electrical Engineering from San Jose State University.
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