As next-generation applications and systems continue driving up I/O bandwidth demands, transceivers are evolving to meet these requirements. The latest-generation transceivers deliver the highest data rates, at up to 28 Gbps, at the lowest power for applications such as 100 Gigabit Ethernet systems.

In this 40-minute webcast, you’ll get a close look at key transceiver capabilities in our 28-nm Stratix’ V FPGAs:

  • Advanced signal conditioning for backplane and optical interfaces
  • Flexible clocking options with abundant low-jitter transmit clocking sources
  • Robust package-die design for best-in-class signal and power integrity
  • Simulation and link analysis flow for enhanced transceiver design productivity

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Salman Jiva
Product Marketing Manager
Altera Corporation

As Product Marketing Manager for Altera’s high-end FPGA product lines, Salman Jiva is responsible for the technical marketing, positioning and management of high speed SerDes and signal integrity for Altera FPGAs. Prior to joining Altera, he spent six years at Cisco Systems as an ASIC signal integrity engineer for their enterprise line of switches. Mr. Jiva holds an MS in Electrical Engineering from Santa Clara University with a concentration in communication systems.

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Dr. Mike Peng Li
Principal Architect & Distinguished Engineer
Altera Corporation

As a principal architect and distinguished engineer at Altera Corporation, Dr. Mike Peng Li is a corporate expert and adviser on jitter, noise and high-speed link and SERDES architecture. He is also Co-Chairman for PCI Express jitter standard committee. Dr. Li has contributed and authored many high-speed link standard specifications, including PCI Express, Giga Bit Ethernet, Fibre Channel, Serial ATA, and CEI/OIF. Prior to joining Altera in 2007, Dr. Li was chief technology officer at Wavecrest Corporation, where he developed the technology leadership and vision for the company and was awarded several patents in high-speed communications. Dr. Li holds six patents and is awaiting approval on six others. He also has authored or co-authored five books/book chapters on jitter and high-speed I/O and has more than 80 published technical papers. Dr. Li holds a Ph.D. in physics, an M.S.E. in electrical and computer engineering and an M.S. in physics, all from the University of Alabama, Huntsville. He also holds a B.S. in physics from the University of Science and Technology of China.