Exploding Bandwidth? New Virtex-5 TXT FPGAs for High-Bandwidth Bridging
Architectural Options for Implementing 100Gig Ethernet
and Other Ultra High-Bandwidth Applications with a Single Virtex-5 TXT FPGA
Manufacturers of telecommunications equipment are racing to deploy 100Gigabit Ethernet technology in response to the explosion in Internet bandwidth consumption driven by the popularity of IP video and enhanced media content. Xilinx is accelerating this next wave of infrastructure scaling with Virtex®-5 TXT FPGAs—which offer up to 48 GTX 6.5Gbps serial transceivers—along with hardware-verified IP, and a complete design tool suite.
In this webcast we will:
- Explore the unique challenges of implementing different network line card architectures
- Survey available architectural options
- Consider potential design pitfalls and identify workarounds
- Review IP offerings for key protocols such as 100Gig Ethernet, 40Gig Ethernet, Interlaken, SFI-5, OTU-3, OC-768, and others
Anthony Torza is a Technical Marketing Engineer for Xilinx specializing in SERDES products. He has been with Xilinx for 4 years. Previously he was a System Architect and Hardware design engineer for various telecom equipment companies including CIENA and Tellabs. He holds an MSEE from Stanford.
Please disable any pop-up blockers for proper viewing of this webinar.