Ensuring Safe Design for Mil-Aero & Safety-Critical Applications
When designing for programmable logic in Mil-Aero and safety-critical applications, hardware engineers must make special considerations for the safety and operability of the overall system. This web seminar series introduces exciting new innovations in FPGA synthesis and tool flows including new features being offered for the first time in any FPGA synthesis tool.
Webinar topics include:
- Fault Tolerant Finite State Machine (FSM) Design
- Triple Mode Redundancy (TMR) in Synthesis
- Requirements Tracing through Synthesis
- Formal Verification of Advanced FPGA Synthesis Optimizations
- Synthesis and DO-254 Considerations
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