ARM’s newest processor is designed for a very efficient, low-cost main-stream mobile handset market. This webinar will discuss how this extremely power-efficient design will enable entry-level smartphone SoC designs. We will describe, in detail, the design choices considered including choice of feature set and performance level and how its simplified pipeline enables dramatically lower power consumption. This processor is ideal for not just the mobile but a slew of other embedded markets.

Attend this webinar to:

  • Learn about the impact of DVFS and RFTS power management policies on run-time static plus dynamic power consumption for Cortex™-A7 based SoCs.
  • Discover opportunities for power management in multi-core systems.
  • Review power management approaches for entry-level smart phones and similar mobile products.
  • Find out about power management approaches for single-board computers and similar low cost computing platforms.

Brian Jeff, CPU Product Manager, ARM
Brian Jeff joined ARM in 2009 and currently holds the position of CPU Product Manager with responsibilities including the Cortex™-A5 processor and next generation Cortex-A class processors. Previous roles within ARM include Product Manager for CPU Benchmarking. Prior to joining ARM, Brian held product management roles at Freescale Semiconductor and Texas Instruments, and was a field applications engineer at Texas Instruments from 2000 to 2005. He holds a BSEE from Virginia Tech and an MBA from the University of Texas at Austin.