Overview:


Due to their spatial structures, FinFETs have several advantages including controlled Fin body thickness, low threshold
voltage variation, reduced variability, and lower operating voltage. With significantly higher wafer prices, maximizing yield
is even more important. Modern FinFET-based memories can be impacted by unique defects that require new test and repair algorithms.
The approaches used for planar-based memories cannot provide the appropriate level of defect coverage for FinFET-based memories.

This webinar will discuss the unique challenges associated with testing FinFET-based memories and introduce new methods
to address them. It will describe new FinFET-specific defects with methods to detect them and maximize yield with an effective
repair solution. The webinar will describe new FinFET-specific defects and novel test algorithms to detect them. It will
also describe built-in self-test (BIST) infrastructure with high-efficiency test and repair capabilities to ensure high yield
for FinFET-based memories. Finally, the webinar will describe how this methodology has been validated on silicon across multiple
foundries.

After the webinar, attendees will understand:

  • The new design complexities, defect coverage and yield challenges presented by FinFET-based memories
  • How to synthesize test algorithms for detection and diagnosis of FinFET memory errors
  • How incorporating built-in self-test (BIST) infrastructures with high-efficiency test and repair capabilities can help to
    ensure high yield for FinFET-based memories

Speakers

Yervant Zorian
Chief Architect,
Synopsys

Dr. Zorian is a Chief Architect and Fellow at Synopsys. Formerly, he was a Distinguished Member of Technical Staff AT&T Bell Laboratories, Vice President and Chief Scientist of Virage Logic, and Chief Technologist at LogicVision. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founder and chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, and the General Chair of the 50th Design Automation Conference (DAC) and several other symposia and workshops.

Dr. Zorian holds 34 US patents, has authored 4 books, published over 350 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He received the IEEE Distinguished Services Award for leading the TTTC, the IEEE Meritorious Award for outstanding contributions to EDA, and in 2014, the Republic of Armenia’s National Medal of Science.

He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.