For gigasample per second ADCs, one of the most important measures of dynamic range performance is SFDR. It defines the capability of the ADC and the system to decipher a carrier signal from noise, interferers, or any other spurious frequency. This webcast examines the SFDR specification, how it is described in converter datasheets, the architectures that limit or maximize the ADC performance, and system design aspects that limit SFDR performance.

Who Should Attend:

Engineers interested in the following Products: high-speed ADCs, high-speed DACs, wideband data acquisition; or interested in the following Market segments: Communications infrastructure, RF instrumentation, Defense electronics, RF system design engineers, RF systems integrators.


Ian Beavers

Ian Beavers is an applications engineer for the High Speed A/D Converters team at Analog Devices, Greensboro, N.C., with more than 18 years of experience in the semiconductor industry. He has a bachelor’s degree in electrical engineering from North Carolina State University and an M.B.A. from the University of North Carolina at Greensboro.