Debugging High Speed Memory and Serial buses with Greater System Visibility
System integration and validation has become more challenging due to greater levels of sophistication and complexity in modern mixed signal designs. This live webinar will focus on the latest tools and techniques for properly verifying analog and digital characteristics of high performance designs. In-depth applications examples will be covered including FPGA debug, high speed serial links and DDR memory testing. Attend this 45 minute webinar followed by a live Q&A with Tektronix Randy White.
What You Will Learn:
– Latest tools and techniques for system validation and debug
– Tips for testing and troubleshooting DDR memory and serial standards
– Best practices for accurate measurements including probing and signal analysis
Randy White, Serial Applications Technical Marketing Manager, Tektronix
Randy White is the Serial Applications Technical Marketing Manager at Tektronix. Randy has worked with various aspects of test and measurement solutions at Tektronix over the past few years. He has given seminars on high-speed serial measurements and is actively involved in many working groups for high-speed serial standards. He holds a BSEE from Oregon State University in Corvallis.
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