Overview:

Learn how to design DC to DC power supplies and how to optimize and make tradeoffs for high efficiency, small footprint and low system cost. Design procedures will be discussed including equations for calculating power dissipation and also how to choose MOSFETs for controllers. Use of the Bode Plot for visualizing system stability will be covered. Design examples will be shown including a buck power supply and a synchronous controller.

Attendees will learn how to:

  • Create a DC to DC power supply
  • Make tradeoffs between high efficiency, small footprint and system cost
  • Visualize component parameters through graphical charts
  • Calculate power dissipation, efficiency and other key operating parameters
  • Observe graphs of operating parameters over voltage and current
  • Conduct electrical simulations to view dynamic system response
  • Perform thermal simulations to identify and correct temperature issues on the PC board
  • Obtain a prototype kit for your power supply design shipped via overnight carrier
  • Generate an automatic design report to document your design
  • Who should attend:
    Engineers who need to design DC to DC power supplies in a rapid manner while also meeting efficiency, footprint and cost goals.

    Moderator:
    Maury Wright is a veteran technology journalist and marketing consultant with expertise that ranges from power supplies and power management to microprocessors and digital-media-centric consumer applications. Maury has served as site editor for TechInsights' Digital Home and Power Management DesignLines. Previously Maury was Editorial Director and Editor-In-Chief of EDN Magazine. Maury was also the founding editor of CommVerge Magazine – a publication dedicated to the convergence of voice, video, and data in networks and connected products. Maury has an electronic engineering degree from Auburn University and also took a number of graduate level DSP courses at San Diego State University.

    Presenter:
    PresenterJeff Perry is the senior development manager for National Semiconductor's WEBENCH online design environment. He graduated from UCLA with a BS in Physics and received an MBA from San Jose State University. He spent the first part of his career in semiconductor process engineering and the latter portion in power supply applications and development. He has been involved with the WEBENCH tool since it's inception in 1999. Jeff holds 10 patents.