Traditionally, wireless modem chips have been designed by combining a general-purpose microprocessor for control code with fixed-function hardware blocks for high-performance signal processing. However, requirements for wireless modems under current development seem contradictory:

  • Multiple (even still evolving) standards must be supported by the same modem chip. This requires more software programmability in the signal-processing part, often captured by the term Software-Defined Radio (SDR).
  • Performance and latency requirements are going up. This calls for more computational performance in the signal processing part.

As a consequence, heterogeneous multicore SoC architectures are evolving for wireless applications. These architectures are an evolution from traditional SoCs composed of microprocessor cores and fixed-function hardware blocks, by replacing the hardware blocks with ASIPs. While each ASIP is software-programmable, its architecture is optimized for the set of functions that it has to implement, with some margin for algorithmic evolution.

In this webinar we will use several real-world examples to highlight why ASIPs can offer computational performance close to fixed-function hardware blocks, providing instruction-level and data-level parallelism, as well as by introducing specialized hardware operators. The resulting heterogeneous multicore SoC is fully programmable but typically requires less silicon area and consumes less power than a homogeneous multicore solution.

Who should attend:

  • SoC designers involved in complex signal-processing subsystem designs 
  • Processor designers who want to perform architectural analysis, with performance, power and area taken into account 
  • Project managers who want to understand the alternatives to standard processors and fixed hardware, and the design flow implications 
  • SoC architects who are working on complex real-time signal-processing requirements and looking for ways to offload the computation intensive tasks from the main application processor

What Attendees will learn

  • Why a heterogeneous multicore design can achieve the balance of programmability, performance and power efficiency
  • Why application specific processors (ASIP) are suited for high-performance signal-processing applications


Markus Willems
Product Marketing Manager, Synopsys

Markus Willems is currently responsible for Synopsys’ application-specific processor (ASIP) development activities. He has been with Synopsys for 14 years supporting various system-level and functional verification marketing roles. He has worked in the electronic design automation and computer industries for more than 20 years in a variety of senior positions, including marketing, applications engineering, and research. Prior to Synopsys, Markus was product marketing manager at dSPACE, Paderborn, Germany. Markus received his Ph.D. (Dr.-Ing.) and M.Sc (Dipl.-Ing.) in Electrical Engineering from Aachen University of Technology in 1998 and 1992, respectively. He also holds a MBA (Dipl.Wirt-Ing) from Hagen University.