Build low-power, high-performance mobile SoCs with complete MIPI solutions
System-on-chip (SoC) designers can be overwhelmed by the number and complexity of connectivity protocols that need to be managed on a single chip. MIPI protocols are increasingly being adopted in the market, primarily interfacing an SoC to camera, display and RFICs, while newer MIPI protocols are being promoted for storage, chip-to-chip connectivity and next-generation camera and displays. This webinar explains the building blocks and integration challenges faced by designers while integrating MIPI protocols into SoCs. The webinar will show an example design that demonstrates how to develop more power-efficient and higher performing mobile multimedia devices, while meeting critical time-to-market windows that are imperative in this dynamic market.
What attendees will learn:
- Understand popular MIPI protocols, what they are and how they work
- How to design a standard interface to camera, display and RFICs
- Trends in the mobile electronics market and what MIPI protocols solve
- Help navigate existing and future protocols required in mobile electronics
Hezi Saar, Staff Product Marketing Manager, Synopsys
Hezi Saar serves as a staff product marketing manager at Synopsys and is responsible for its DesignWare MIPI controller and PHY IP product line. He brings more than 15 years of experience in the semiconductor and electronics industries in embedded systems. Prior to joining Synopsys, Saar was responsible for Advanced Interface IP at Virage Logic t hat was acquired by Synopsys, from 2004 to 2009, Saar served as senior product marketing manager leading Actel’s Flash field-programmable-gate-array (FPGA) product lines. Previously, he served as a product marketing manager at ISD/Winbond and as a senior design engineer at RAD Data Communications. Saar holds a bachelor of science degree from Tel Aviv University in computer science and economics and an MBA from Columbia Southern University.
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