Overview:
Is mixed-signal verification a major bottleneck within your IC design and verification flow?

Are you part of an analog/mixed-signal design team that is required to deliver a high-quality functional “digital-ONLY” simulation net list to a digital verification organization as part of SoC verification?


If you answered yes to the above questions, attend this webinar and learn how Cadence’ Services can help you:

  • Reduce risk and boost verification productivity to obtain first-pass functional silicon
  • Establish a scalable mixed-signal functional verification methodology
  • Improve the quality of block signoff (compliance) and signal-path verification, thereby increasing the chance of first-pass spec-compliant silicon


This webinar will introduce you to the following packaged services offerings from Cadence and how they can best be applied to meet your mixed-signal verification needs:

  • Mixed-signal functional verification – Behavioral modeling is the key technology to enable comprehensive mixed-signal functional verification. Cadence Services has been on the leading edge of behavioral modeling development as applied to mixed-signal functional verification for several years. This service will enable any IC mixed-signal design and verification organization to establish verification capability for:
    • AMS flow (uses analog/mixed-signal simulation)
    • DMS flow (uses digital-ONLY simulation)
  • Mixed-signal signal-path (spec) verification – Cadence Services will work with you to evaluate your current signal-path verification methods for the purpose of improving your signal-path verification process. This service focuses on block-level specifications and how to model this behavior to increase simulation throughput.

Cadence Services can also provide:

  • Mixed-signal verification assessment of your current methodology related to these two different verification processes (AMS/DMS and signal-path). We offer expert recommendations, deliver metrics of your verification process and environment, and compare the results to industry best practices.

Who should attend?

  • RF and AMS IC design engineers
  • Verification engineers and managers

Presenter:
William Dunham, Director Engineering Services, RF-A/MS Applications, Cadence Design Systems, Inc.

As Engineering Services Director within the Custom IC tools group at Cadence, William Dunham focuses on analysis, architecture and implementation of design flow and methodologies for RF Analog/Mixed-Signal systems through IC applications. William has worked in Methodology Services of Cadence for over 11 years, but took a short break (2004 ” 2005) from Cadence to become Director of Engineering at RFco Semiconductor.


Prior to Cadence, William worked as Director of Technology Center (Tokyo) and later as Product Line Manager (NJ) for Mentor Graphics. Previous to working in EDA, William spent several years as design manager design engineer for semiconductors and systems at Texas Instruments, Litton Industries; and also VP of Advanced Micro Electronics (now a design center owned by Freescale Semiconductor).


William has 40+ years of experience in systems, semiconductor and EDA industry. William holds a Bachelor of Science degree in Electrical Engineering from Texas Tech University and has published papers and articles on RF design methodology.