Join Synopsys for this three part webcast for serious FPGA designers. The sessions will introduce you to tools that provide more productive and predictable design and verification techniques.

  • Part 1: Synthesis and Timing Closure
  • Part 2: Algorithmic Model-based Design
  • Part 3: FPGA Design Verification

If you design FPGAs, do ASIC prototyping using FPGAs or work in a system-level environment, you won’t want to miss these informative webcasts.


Doug Amos, Business Development Manager, Solutions Marketing
Doug Amos brings more than 20 years of experience in the field of FPGA and ASIC design to his role as business development manager, solutions marketing at Synopsys. In this role, he is responsible for supporting multiple technologies, maintaining a broad view of all Synplicity Business Group offerings and other Synopsys technologies and for raising awareness of these within the European design community.

Prior to joining Synopsys, Mr. Amos held several positions at Synplicity, Inc., including Director of European Marketing and Technical Director; Synplicity was acquired by Synopsys in May 2008. Before joining Synplicity as their first engineer in Europe, Amos managed Altera’s Field Applications Engineers in Europe. Mr. Amos also held various consulting and engineering positions with Actel, Altera, and Xilinx.

Mr. Amos holds a BSc. in Electrical and Electronic Engineering from the University of Bath, England.

Chris Eddington, Director of DSP Marketing, Synplicity Business Group, Synopsys, Inc.
Chris Eddington, in his role as Director of DSP Marketing at Synopsys, is responsible for the Synplicity Business Group’s DSP product strategy, definition, and launch.

Prior to joining Synopsys, Mr. Eddington was Director of DSP Marketing at Synplicity, Inc., which was acquired by Synopsys in May 2008. Before Synplicity, he was Director of Technical Marketing at Mellanox Technologies leading High Performance Networking marketing strategy and 8×8 Inc., developing DSP microprocessors for multimedia applications. Earlier work includes several IC design positions in the wireless communications and networking industry.

Mr. Eddington holds a Masters Degree in Signal and Image Processing from the University of Southern California.