Achieving 800-MHz DDR3 Performance With Advanced Silicon and Memory IP
FPGA applications are demanding higher memory bandwidth and greater performance. To meet these requirements, we offer external memory solutions that are faster, better, and easier to use.
In this 20-minute webcast, you'll learn:
- How we achieved 800-MHz DDR3 interfaces in our 28-nm Stratix® V FPGAs.
- How we enhanced our memory intellectual property (IP) through extensive verification and more accurate timing models.
- How you can achieve higher productivity with our memory solutions.
Bryce Mackin – Manager, Product Marketing, Altera Corporation
Bryce Mackin is a product marketing manager responsible for Altera's mid-range, transceiver-based Arria FPGA product family. He is also responsible for Altera's external memory interface IP, including PCI Express IP (Hard IP and Soft IP), targeting all of Altera's devices. Prior to joining Altera in 2006 Mr. Mackin held several marketing and engineering roles at various semiconductor and systems companies. He has focused his 14 year career in the semiconductor industry on achieving the optimum performance for semiconductors, IP and systems solutions. Mr. Mackin holds a BS degree in industrial and system engineering from San Jose University.
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