Accurate Power Analysis of Low Power Techniques Using PrimeTime PX
Many constraints drive the demand for low-power design techniques in today’s designs including battery life, packaging and cooling considerations as well as design reliability. In addition to applying low power design techniques it’s helpful, and often necessary, to accurately analyze and understand the effectiveness of these various techniques in reducing power consumption in your design.
This technical webinar will explain how PrimeTime PX can be used to analyze the effectiveness of low power design techniques such as clock gating, use of multi-voltage rails and power gating. Attendees will learn how to further optimize their designs for power by analyzing which low-power techniques work best under differing conditions. You will also learn how to use PrimeTime PX to understand which modes of operation consume the most power.
This 30 minute webinar will be followed by a Q&A session with our Corporate Applications and R&D teams.
Who should attend:
Designers & managers responsible for design power analysis and signoff.
David Le, Senior Manager, CAE, Implementation Group, Synopsys
David Le is the Senior Manager for the PrimeTime PX Corporate Application Engineering group. He started his career in IC design and then moved into EDA, joining Synopsys in 2003 where he developed reference flows for Galaxy Low Power and Strategic Partnership Programs prior to assuming his current role. David received his BS degree in Electrical Engineering and Computer Science from the U.C. Berkeley and his MBA degree from the University of Phoenix.
Maria Tovey, Staff Engineer, CAE, Implementation Group, Synopsys
Maria Tovey is a Corporate Applications Engineer at Synopsys. She began her career designing ICs before moving into the EDA industry. She joined Synopsys in 1997 and is currently a member of the PrimeTime PX team, responsible for power analysis. Maria was involved in the integration of power analysis into PrimeTime, and has participated in the rollout of technologies such as clock-gating efficiency analysis, activity analysis and power scaling. She received her BS in Electrical Engineering at Rensselaer Polytechnic Institute in upstate New York.
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