Overview:
1/f noise, or flicker noise is a very key device
characteristic which directly impacts the circuit performance, and has also been
used to characterize the manufacturing process quality. However, accurately
measuring 1/f noise at wafer level is challenging and time consuming, especially
at advanced process nodes. This webinar will go through all the key aspects of
how to improve wafer-level 1/f noise measurement and validate its data, and
introduce the latest generation measurement system from ProPlus, and describe
its capabilities such as how it maintains the highest accuracy, delivers true
10MHz measurement bandwidth and increases measurement throughput.

What attendees will learn:

  • Architecture of a modern noise measure system
  • The keys for on-wafer noise measurement and how to validate noise data
  • How to improve noise measurement quality for different devices at different
    bias conditions
  • How to improve noise measurement resolution & measurement throughput
    while extending noise measurement to a higher frequency
  • Improvements of noise system 9812D over 9812B
  • Unique capabilities of 9812D versus other commercial systems

Who should attend:
Academics, engineers and
management looking for solutions to improve on-wafer noise measurement quality.

Attendees will also have a chance to interact with the presenter during
a 10-minute Q&A session. Attendees can also contact ProPlus (t-support@proplussolution.com)
directly after the Webinar.

Presenter:

Dr. Zhihong Liu, Executive Chairman, ProPlus Design Solutions,
Inc.

Dr. Zhihong Liu currently serves as the Executive Chairman of
ProPlus Design Solutions, Inc. He was most recently the Corporate Vice President
for CSV R&D at Cadence Design Systems Inc. Dr. Liu co-founded BTA Technology
Inc. in 1993 and invented BSIMPro, the world’s most leading Spice modeling
product. He also served as the President & CEO of BTA Technology Inc. and
later Celestry Design Technology Inc., which was acquired by Cadence in 2003.

Dr. Liu holds a Ph.D. degree in EE from the University of Hong Kong and
co-developed the industry’s first standard model (BSIM3) for IC designs as one
of the main contributors at the University of California at Berkeley.