FPGAs provide multi-gigabit serial transceivers to implement high-speed serial protocols and have become the platform of choice for a large and growing number of applications today. In addition to providing flexibility for system design implementation through the FPGA architecture, designs can also be easily modified to meet different performance requirements and support legacy and newer serial / parallel protocols to reduce development and debug costs, significantly accelerating time to market.

While designers have been traditionally integrating multiple IPs, design flows and migrating them from one FPGA platform to another, Xilinx is simplifying and accelerating system design implementations by providing a complete and comprehensive Connectivity platform to design, develop and debug high bandwidth applications through the Targeted Reference Designs.

The Targeted Reference Design, TRD, is delivered through the Connectivity Kits and jumpstarts customer application development by providing a complete design flow for an end-to-end system application—hardware design and RTL source files, simulation environment, implementation flows and scripts, software device driver source files, performance / status monitor application and documentation

Webcast Attendees Will Learn:

  • If you are a system architect / hardware designer: you will able to learn and understand system design fundamentals on implementing High Bandwidth applications in FPGAs. You will also be able to re-use the complete TRD deliverable and tune it for your application.
  • If you are new to high speed serial design: you will learn and understand how the Xilinx approach to Serial Connectivity simplifies the adoption of very common industry standard protocols like PCIe and Ethernet.
  • If you are a software designer: you will be able to understand and integrate the software device driver deliverables for PCIe implementation in your own application.
  • In addition, the design flow will help you to understand and leverage FPGAs to rapidly adapt to changing feature and performance requirements

Who Should Attend:

  • System Architects, Design Managers
  • Hardware Designers
  • Software Designers and developers

Navneet Rao, Product Manager, Connectivity Design Platforms
Navneet Rao manages Connectivity Platforms Solutions at Xilinx, Inc. He specializes in High Speed Connectivity solutions for FPGA technologies, Transceiver technologies, Communication Platform Design, WiMAX / Switch Fabric /Router platform ASICs and Microcontrollers.
Previously he led teams in architecting and designing Transceivers, Switch Fabric ASICs at Mindspeed Technologies (aka Hotrail, Inc). Navneet has excellent experience having worked in product development teams at Philips Semiconductors developing a communication ASICs for basestation platforms and at LSI Logic designing microcontrollers.
Navneet has over 14 years industry experience after completing his MSEE from the Indian Institute of Technology, Kharagpur, India.