The Xilinx® Virtex™-4 family introduced a new high-performance concept for fast and complex DSP algorithm implementation. The XtremeDSP™ Design Considerations User Guide describes how you can take advantage of the DSP48 architecture and includes several examples.

When you have to develop a real DSP application, you can of course instantiate each DSP48 block and assign their respective attribute values to obtain the correct behavior. But did you know you can also infer most of the useful DSP48 configurations by writing very simple RTL code?

Developing DSP algorithms in VHDL (or Verilog) is a nice way to maintain designs over a long period of time, but the synthesis results must meet your performance requirements. In this article, I will show you how to write RTL code to take full advantage of Virtex-4 DSP48 blocks.

Reprinted with permission from Xcell Journal / Fourth Quarter 2005. Article © Xcell Journal.