Understanding the load presented by the reference pin of SAR ADCs is key when designing data-acquisition systems with low harmonic distortion. The internal circuitry connected to the reference pin of most successive-approximation-register analog-to-digital converters (SAR ADCs and some wideband delta-sigma ADCs) consists of switched-capacitor loads. During the conversion process, a switched-capacitor load imposes a current demand that can cause the external system’s reference-output voltage to fluctuate in time. Consequently, the SAR ADC reference-pin voltage also fluctuates.