Distributed arithmetic (DA) is a digital design technique for implementing a fast multiplier accumulator working on a group of product terms. Instead of using multipliers and accumulators, DA uses lookup tables and adders. In this paper, the technique for designing multiplier accumulators based on DA is presented with simple examples. Performance trade-off between DA and multiplier-based design is discussed, along with advantages and disadvantages of DA. Then, real examples taken from digital FIR filters and DCT (discrete cosine transform) using both approaches are presented at VHDL and Verilog level. Each implementation will be examined in terms of speed and density after synthesis.