Verification Methods Applied to the ST Microelectronics GreenSIDE Project
This white paper examines the verification methodology and tools used in ST Microelectronics’ GreenSIDE project. The paper focuses on the central memory architecture, the GreenSIDE Main Memory (GMM), and its standard AMBA interfaces. The GMM plays a key role in the overall design?s verification, because all the main system-on-chip (SoC) components interact with this central main memory. Fundamentally, the verification of critical paths starts and ends within the GMM block. This white paper explains how the ST team used Synopsys’ DesignWare? memory models, the DesignWare C-based memory core (memcore), and the Synopsys MemScope graphical memory debugging tool to verify the GMM in both standalone and SoC simulation environments.
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