The design of the ARM1136JF-S core was a major engineering project, taking more than 70 man-years in development with approximately one-half of that effort dedicated to verification. To develop the core, the design team chose a methodology that enabled each block to be independently tested during development and a simplified way to configure system-level tests.

The team’s verification methodology provided the ability to easily reconfigure the design to include or exclude various design blocks as needed, as well as define and track coverage points for the core RTL and correlate these points with dynamic information from simulation. Finally, the team’s verification methodology enabled them to develop their testbenches as independent, reusable blocks, of which large portions can be reused on upcoming ARM11 microarchitecture derivatives’ designs.

Reprinted in its entirety from ARM IQ Vol. 3, No. 2