In the fast-paced world of FPGA development, Xilinx has struck again with its second- generation ASMBL architecture devices, the Virtex-5 family. This device family has many upgrades from its predecessor, the Virtex-4 family, and likewise continues the evolution of the ASMBL architecture, with scalable FPGAs catering to the application-specific marketplace. For commercial off-the-shelf (COTS) developers, this means a platform that is low cost, light on power consumption, and optimized for high performance.

When creating the Virtex-4 family, Xilinx harnessed the flexibility of the ASMBL architecture to build the first multiplatform FPGA family. Xilinx continues this approach with the Virtex-5 family. The initial offering is the Virtex-5 LX platform, optimized for high-performance logic. Seasoned FPGA users expect new FPGA generations to deliver more and the Virtex-5 family certainly delivers, all while consuming less power.

This article will examine those Virtex-5 architecture components that enable COTS designers to deliver more bang for the buck.

Reprinted with permission from Xcell Journal / Fourth Quarter 2006. Article © Xcell Journal.