Xilinx® device architectures include several configurable functional blocks—including clocking, digital signal processing, and high-speed I/O blocks—that provide you with advanced functionality. Typically, these blocks are fairly complex in their operation and yet very flexible, so parameterizing them for the desired behavior can be a daunting and time-consuming task if done by hand.

The architecture wizards found in the ISE™ Foundation™ design environment can streamline the process of customizing such blocks. There are several wizards available; each one leads you through a sequence of screens that allows you to precisely define the behavior of the block at hand. Each screen has built-in design rule checking that ensures that the result will be “correct by construction”—that is, that the combination of selections made is a legal configuration of the target block.

Reprinted with permission from Xcell Journal / Fourth Quarter 2005. Article © Xcell Journal.