Direct memory access (DMA) is very important for large-volume, high-speed data transfer from host central processing units (CPUs) to graphic display controllers (GDCs). One of the most common uses for DMA is display of a Startup screen (a bitmap) in an automotive cluster or navigation application after a system powers up. Historically, Fujitsu GDCs have supported a 32-bit, non-address-multiplexed interface for the host controller. This mode supports the DMA signals (DREQ, DRACK and DTACK) that allow the host CPU’s DMA controller to access Lime, a new graphics controller from Fujitsu.

With the introduction of Lime, Fujitsu has added versatility to the GDC host interface by enabling 16-bit, dedicated or address-multiplexed modes, in addition to a 32-bit, address-multiplexed interfaced mode. The GDC uses an unconventional technique for data transfer to keep supporting DMA access from the CPU in these modes. This paper explains how the DMA transfer works in such a case.