Using CacheTune (Code Composer Studio v3.0) to Improve Cache Utilization on TMS320C6000 Targets
Many of today’s digital signal processors (DSPs) have incorporated cache into the on-chip memory to support higher clock rates. While cache improves processor throughput by reducing the average memory access time, sub-optimal cache usage causes some performance overhead and could become a critical bottleneck in the system. Maximizing cache effectiveness becomes a key to boosting the overall system performance.
CacheTune is a new tool that helps the developer attain high levels of cache efficiency by addressing the issues in cache visualization, analysis and optimization. It graphically visualizes program and data cache accesses over time, which enables quick and effective reorganization of non-optimal cache utilization. The tool also provides proactive advice in guiding the developer to analyze the memory accesses patterns and tune the cache memory subsystem to meet performance goals.
This application report introduces the CacheTune tool, discusses the recommended code development flow to tune your application for a high level of cache efficiency and uses an example to illustrate the necessary steps required to utilize the CacheTune tool.
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