Understanding the Low Power Abstraction
We define four abstract models in common use today for electronic design—electrical, digital gate, digital RTL, and transactional—and discuss the relationships among them. The new low-power model described by IEEE Std 1801-2009 UPF is introduced, and its relationship to the other signal-level models for digital and analog design is defined. We then discuss the connections between the low-power model and the underlying physical implementation of a chip, elucidating some of the concepts in the low-power model that are missing from the commonly used abstract models. We define extensions to the electrical/RTL boundary model to support application of the low-power model in mixed-model simulation. Finally, we recommend extensions to the existing transaction model to reflect the concepts of the low-power model.
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