Field Programmable Gate Arrays (FPGAs) are becoming more attractive than Application Specific Integrated Circuits (ASICs) to design teams developing nextgeneration electronic products. That’s due to a variety of reasons including their increased gate counts, versatility, and lower development and manufacturing costs. FPGA devices are now being fabricated in advanced, ultra-deep submicron technology with multi-million gate capacity, and clock speeds approaching 400 MHz. With these larger, more complex FPGAs come new design challenges, including problems associated with interconnect delay. In this article, Salil provides tips for FPGA design.

Reprinted with permission from Embedded Computing Design/Spring 2004. Article © OpenSystems Publishing.