As the highest-speed and most widely distributed signal in the system, clock-tree circuits have a major impact on system performance, power dissipation, electromagnetic interference (EMI) and cost. If optimally implemented, they offer designers tremendous dividends in terms of efficiency, reliability and faster turnaround. IC manufacturers now offer a wide variety of silicon-timing devices designed to integrate traditional timing functions into a single chip. This paper reviews the challenges designers face today as they develop clock-timing circuits and examines how these different components can impact their design.