Increasingly stringent signal integrity requirements and increased susceptibility of system integrated circuits (ICs) to electrostatic discharge (ESD) are leading to fundamental changes in ESD protection strategies at the system design level. The traditional approach to dealing with higher data rates has been to reduce the capacitance of the ESD protection device; this tends to reduce its ESD protection capabilities, which forces system designers to make tradeoffs between system reliability and signal integrity.

This paper discusses a new solution for meeting today’s ESD requirements: California Micro Devices’s (CMD) forthcoming PicoGuard XP architecture, the first member of the XtremeESD family of ESD protection devices. The architecture is designed to provide outstanding signal integrity for high-speed data interfaces while providing enhanced ESD protection.