A growing number of Xilinx® customers are enjoying improved performance, reduced engineering time and design costs, and the ease of use offered by the PlanAhead™ design and analysis tool. These customers are expressing the same realization—a complete paradigm shift in their FPGA design flow.

In this article, I’ll discuss the processes that these engineers and I use, and provide statistics on what customers are seeing from using PlanAhead software. When doing your own floorplanning, remember that poor floorplanning can give you worse timing, larger device utilization, and longer place and route run times. My goal is to outline the concepts to help you accomplish your performance goals.

Reprinted with permission from Xcell Journal / Third Quarter 2005. Article © Xcell Journal.