The I2C (Inter-IC) bus has become a popular serial bus architecture which needs to be understood for proper implementation. On the hardware level, I2C is a collection of microcomputers with integrated I2C port (Philips PCD33xx, PCF84Cxxx, and many of their 80(C)51 family derivatives, plus µCs from several other manufacturers), and a peripheral set (LCD/LED drivers, RAM, ROM, E2PROM, Clock/Calendars, I/O, A/D, D/A, IR transcoders, frequency synthesizers, audio processors, telephony ICs and various tuning ICs for TV/radio). These devices all communicate serially over a two-wire bus, serial data (SDA) and serial clock (SCL). The I2C structure is optimized for hardwire simplicity. Parallel address and data buses inherent in conventional systems are replaced by a serial protocol that transmits both address and bidirectional data over a two-wire bus. This means that interconnecting wires are reduced to a minimum; only VDD, ground, and the two-wire bus are required to link the controller(s) with the peripherals or other controllers. This results in reduced IC size, reduced pin count, and simpler interconnections. An I2C system is therefore smaller, simpler, and cheaper to implement than its parallel counterpart.